MOS PCell Architecture (Cadence SKILL)

Architecture Overview (Visual)

Derived Geometry


(gatePitch (+ l polySpace 2*gateExt))
(activeLen
  (+ (* nf l)
     (* (max 0 (- nf 1)) polySpace)
     (* 2 gateExt)))
(odLen (+ activeLen (* 2 sdExt)))
(odWid w)

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Coordinate Frame (Centered Origin)


(x0 (- (/ odLen 2.0)))
(y0 (- (/ odWid 2.0)))
(x1 (+ (/ odLen 2.0)))
(y1 (+ (/ odWid 2.0)))

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Contact Rows (Source / Drain)


(contRowYclear (- (/ odWid 2.0) contEncOD))
(contYmin (- contRowYclear contSize))
(contYmax contRowYclear)

(m1Ymin (- contYmin m1OverCont))
(m1Ymax (+ contYmax m1OverCont))

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Core Geometry Creation

Note: This section focuses on OD geometry creation. Gate, contact, and metal shapes are described in earlier sections.


dbCreateRect(
  cv
  list("OD" "drawing")
  list(x0:y0 x1:y1)
)

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Pin Creation


dbCreatePin(cv "D" "metal1" list(dX0:dY0 dX1:dY1))
dbCreatePin(cv "S" "metal1" list(sX0:sY0 sX1:sY1))
dbCreatePin(cv "G" "poly"   list(gX0:gY0 gX1:gY1))
dbCreatePin(cv "B" "metal1" list(bX0:bY0 bX1:bY1))

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Author: test chips and electrical process control monitors (PCM)
https://junowedd.github.io/technotespark/