Voltage-Aware DRC Analysis

Abstract— Voltage-aware DRC ensures layout spacing rules are evaluated based on voltage differences (ΔV) between power domains. As technology scales and multiple supply domains increase, deterministic voltage-aware checking becomes essential for reliability and dielectric integrity.
I. Increasing Complexity in Multi-Voltage Designs
Modern dies contain multiple voltage domains. Voltage differences (ΔV) between regions introduce spacing challenges and dielectric stress concerns.
Figure 1
Fig. 1. Increasing complexity due to multiple voltage domains.
II. Voltage-Aware Spacing Requirements
Spacing rules must vary depending on voltage combinations: 5V ↔ 5V 3.3V ↔ 3.3V 3.3V ↔ 5V Greater ΔV requires larger spacing to prevent breakdown.
Figure 2
Fig. 2. Voltage-dependent spacing rules.
III. Limitations of Marker Layer Methodology
Traditional approaches relied on marker layers to isolate voltage regions. However, advanced nodes introduce: • More voltage domains • Cross-domain routing • Increased rule complexity • Human-error risk
Figure 3
Fig. 3. Marker layer complexity in advanced nodes.
IV. Text-Based Voltage Annotation
Voltage annotations enable deterministic checking by assigning voltage properties directly to nets. Advantages: • Reduced dependency on CAD marker layers • Improved reliability • Better automation
Figure 4
Fig. 4. Voltage annotation methodology.
V. Deterministic Voltage-Aware DRC Flow
Voltage propagation and spacing verification are integrated into connectivity-aware checking.
Figure 5
Fig. 5. Voltage-aware DRC flow architecture.
Conclusion
Voltage-aware DRC provides deterministic, scalable, and reliability-driven spacing verification for multi-domain designs. As nodes scale and power domains multiply, voltage-based rule evaluation becomes mandatory for robust sign-off.