MOS PCell implementation – SKILL

This documentation explains the internal architecture and geometry construction flow of a MOS PCell implemented in Cadence SKILL.

Recommended Reading Order of a planar MOS PCell

1. Architecture Overview
2. Derived Geometry
3. Coordinate Frame
4. Contact & Via Placement
5. Pin Creation

Recommended Reading Order of a FinFET PCell

1. Architecture Overview
2. Planar vs FinFET PCells
3. OPC & Manufacturability
4. PCell Design Principles
5. FinFET Stucture (PDF)

Create ROD Rectangle (DIFF) PCell

1. Architecture Overview
2. Practice PCell (PDF)

Author: test chips and electrical process control monitors (PCM)

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