OPC / RET Technical Notes

Production-oriented notes on OPC and RET, covering Calibre-based flows, partial ILT strategies, and ML-assisted computational lithography used in advanced nodes.

This page curates a collection of production-oriented technical notes on OPC (Optical Proximity Correction), RET (Resolution Enhancement Technology), and advanced lithography optimization. The content is organized to reflect how OPC is actually developed, validated, and deployed in modern semiconductor manufacturing, with emphasis on Calibre-based flows, ILT strategies, and ML-assisted techniques.

Recommended Reading Order of OPC — Hover over each topic number to see the details

  1. OPC Model Summary – Optical imaging and resist modeling fundamentals (Hopkins, Mack model)
  2. Calibre-based OPC Flow (SVG Diagram) – End-to-end production OPC flow visualized
  3. Calibre-based OPC Flow (Text Explanation) – Practical explanation of rule-based, model-based OPC and verification
  4. EUV vs ArF Immersion Lithography – Lithography constraints driving OPC complexity in advanced nodes
  5. Why Partial ILT in ASML / TSMC – Why full-chip ILT is impractical and how ILT is used selectively
  6. OPC / ILT / ML – One Page Summary – Interview-ready overview of modern computational lithography
  7. ML-based Hotspot Selection – Using machine learning to identify OPC and ILT critical regions
  8. Physics-Informed Neural Networks for OPC – Embedding lithography physics into ML-based OPC acceleration
  9. Machine Learning in EUV OPC – Addressing stochastic effects beyond deterministic OPC models
  10. Single-Layer OPC Recipes: EUV Gate vs Contact – How OPC recipes are structured at the layer level, and why EUV gate and contact layers require fundamentally different strategies
  11. Stochastic Effects in Advanced Lithography – Photon shot noise, resist stochastic variability, and random defect formation in critical layers
  12. How OPC Mitigates Stochastic Effects – Distribution-aware targeting, robustness optimization, and failure-prone pattern handling
  13. OPC Runtime Comparison – Performance trade-offs between classic and ML-assisted OPC
  14. Lithography Simulation Software – Overview of tools supporting OPC model calibration and verification
  15. Sign-off Ownership Highlight – Responsibility boundaries between OPC, lithography, and manufacturing
  16. OPC Flows (PDF) – Manufacturing-oriented perspective on OPC and RET

Create OPC (Layer) Excellence

  1. OPC Bottlenecks in FinFET Layout
  2. FinFET Structure (PDF)
  3. MDP Overview: Cadence vs. Calibre Comparison

Last updated: February 2026

Author focus: test chips, lithography sign-off, and electrical process control monitors (PCM)

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